1. Field of the Invention
The present invention relates to a semiconductor memory device. More particularly, it relates to the data output portion thereof.
2. Description of the Prior Art
It is well known that a large memory system can be constructed utilizing a plurality of semiconductor memory devices (integrated circuits) arranged in rows and columns, for example, a memory system constructed with 4 rows.times.8 columns, so as to perform an 8-bit parallel data processing operation. In such a case, the data output terminals of the memory devices arranged in each column are connected to a common data bus.
In the above-mentioned memory system, however, when the system is in a transient state and the power supply is turned on, two or more memory devices in one column may assume a read-mode state. If this happens, a large short-circuit current flows from one memory device to another memory device through a data bus, possibly damaging the output transistors of the data output portion and disconnecting the aluminum connections of the output transistors.